Phase-locked loops (PLLs) are utilized in many applications including clock generating chips for personal computers and other digital systems. An important component of a PLL is the voltage controlled oscillator (VCO) which allows a second oscillating signal to be phase locked to a first oscillating signal.
One type of VCO utilizes a latch triggered by voltage signals generated from first and second charging nodes. An input control voltage signal controls the rate at which the nodes are charged so that the output frequency is determined by amplitude of the control voltage signal.
First and second feedback paths couple the first and second charging nodes where each feedback path includes several serially connected circuit elements. Each circuit element introduces a fixed delay into the feedback path and the sum of the fixed delays determines the maximum of operating frequency of the VCO. Accordingly, the sum of the fixed delays must be kept small to operate at high frequencies.
One problem with latch-type oscillators is that they may enter a stable, non-oscillating state during start-up. Thus, some type of circuitry to restart oscillation must be provided. However, this circuitry can introduce delays into the feedback paths and lower the maximum operating frequency of the VCO.
Additionally, the voltage levels at the charging nodes must be very stable for high-frequency operation and thus the VCO must be isolated from high-frequency noise coupled through the power supply inputs. Typically, large filters are utilized to achieve high-frequency isolation.